Zero capacitance random access memory (ZRAM) is a type of DRAM memory based on the floating body effect of silicon on insulator (SOI) process technology. In ZRAM, the floating body effect allows the memory cell to be built without adding a separate capacitor, as the floating body effect takes the place of the conventional capacitor. Although SOI technology is a relatively expensive technology compared with more traditional CMOS technology, ZRAM offers cheaper on-chip cache memory, with little or no performance degradation.
ZRAM can offer memory access speeds similar to a standard six-transistor SRAM cell used in cache memory; however, ZRAM uses only a single transistor, which affords higher packing densities. The small cell size reduces the size of ZRAM memory blocks and thus reduces the physical distance that data must transit to exit the memory block.
ZRAM with bipolar read solves problems associated with FET-mode read; however, not enough signal is available during a read without requiring unrealistically high NPN gain, or using difficult-to-control avalanche-mode read. ZRAM suffers from low capacitance in the storage element resulting in poor retention time yield, and also from Vt-scatter making it difficult to yield large arrays with adequate signal margin. Nonetheless, ZRAM offers the possibility of very dense low cost memory for logic applications.
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